Psoc Programming Manual

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  • Alone device used for programming PSoC microcontrollers built into (soldered on) the target device. Of this manual or product.
  • Nov 19, 2016 Read about 'PSoC 5LP Programmer Firmware' on element14.com. Today I would like to post an extra project for you.

Psoc Programming Tool

Cypress psoc programming

PSoC Creator is the second generation software IDE to design debug and program the PSoC 3 / 4. Manufacturer detailed reference manual that describes common.

. CY8CKIT-030 ® PSoC 3 Development Kit Guide Doc. # 001-61038 Rev.H Cypress Semiconductor 198 Champion Court San Jose, CA Phone (USA): 800.858.1810 Phone (Intnl): 408.943.2600.

Cypress Source Code and derivative works for the sole purpose of creating custom soft- ware and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as speci- fied in the applicable agreement. 4.2.6.1 Functional Description.24 4.2.7 PSoC 3 Development Kit Expansion Ports.25 4.2.7.1 Port D.25 4.2.7.2 Port E.27 4.2.8 RS-232 Interface.28 4.2.9 Prototyping Area.28 4.2.10 Character LCD.29 CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. A.2.2 PDC-09589 Power.44 A.2.3 PDC-09589 Ground.45 A.2.4 PDC-09589 Bottom.46 Bill of Materials (BOM).47 Pin Assignment Table.52 Using RBLEED Resistor for CapSense.56 CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev.

PSoC Creator™ or alter the sample projects provided with this kit. The CY8CKIT-030 PSoC 3 Development Kit is based on the PSoC 3 family of devices. PSoC 3 is a Programmable System-on-Chip™ platform for 8-bit and 16-bit applications. It combines precision analog and digital logic with a high-performance CPU. Find Example Project under the Example and Kits sec- tion in the Start Page of PSoC Creator or navigate to File Open Example Project. Find Example Project CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev.

The example projects and starter designs are designed for the CY8CKIT-001 PSoC Development Kit. However, these projects can be converted for use with the CY8CKIT-030 PSoC 3 Development Kit or CY8CKIT-050 PSoC 5 Development Kit by following the procedure in the knowledge base arti- Migrating Project from CY8CKIT-001 to CY8CKIT-030 or CY8CKIT-050.

Click the File icon and then click Open. Displays an equation: Times New Roman 2 + 2 = 4 Text in gray boxes Describes cautions or unique functionality of the product.

CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. Insert the kit DVD into the DVD drive of your PC. The DVD is designed to auto-run and the kit menu appears. Kit Menu Note If auto-run does not execute, double-click cyautorun.exe on the root directory of the DVD. CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev.

Go to Start Control Panel Programs Uninstall a program; select the Uninstall button in ■ Windows 7. Go to Start All Programs Cypress Cypress Update Manager Cypress Update Man- ■ ager; select the Uninstall button next to the software to be uninstalled. You can use the USB power to the programming section. If the board is already powered from another source, plugging in the programming USB does not damage the board. CY8CKIT-030 PSoC 3 Development Kit Guide, Doc.

# 001-61038 Rev. With the MiniProg3, programming is similar to the onboard programmer; however, the setup enumerates as a MiniProg3. The Select Debug Target window may be displayed, as shown in Figure 3-3. CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev.

Manual

Kit Operation Figure 3-3. Select Debug Target Window Click Port Acquire. The window appears as follows. Click Connect to start programming. Port Acquire Connect CY8CKIT-030 PSoC 3 Development Kit Guide, Doc.

# 001-61038 Rev. Kit Operation CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev.

Port E (analog performance port) and port D (CapSense or generic port) ■ RS-232 communications interface ■ Prototyping area ■ Character LCD interface ■ CapSense buttons and sliders ■ CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. USB power from the onboard programming section using connector J1 Power from JTAG/SWD programming interface using connector J3 ■ Power through boost convertor that uses the input test points VBAT and GND ■ CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. Figure 4-2. Power System Structure 3.3 V Programming Communication 3.3-V Regulator Power Vddd Vddd Selection (J10) 9-V Battery 5-V Regulator 12-V/9-V Wall Vdda Vdda wart 5-V/3.3-V Analog Selection Regulator (J11) CY8CKIT-030 PSoC 3 Development Kit Guide, Doc.

# 001-61038 Rev. 0, 3, and 4, which are the best performing analog ports on PSoC 3 and PSoC 5 devices. Port E has two types of grounds.

One is the analog ground (GNDA in the silkscreen, Vssa in the CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. Using the JTAG/SWD programming interface with a MiniProg3 ■ 4.2.2.1 Onboard Programming Interface The onboard programmer interfaces with your PC through a USB connector, as shown in Figure 4-4.

CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. Apart from the onboard programming interface, the board also provides the option of using the MiniProg3. This interface is much faster than the onboard program interface. The JTAG/SWD programming is done through the 10-pin connector, J3. CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev.

The USB connector connects to the D+ and D– lines on the PSoC to enable development of USB applications using the board. This USB interface can also supply power to the board, as discussed in Power Supply on page CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. After making these changes, you can configure the project to make a boost convertor-based design.

The input power supply to the boost convertor must be provided through the test points marked Vbat and GND. CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. Figure 4-8 Figure 4-9 are protection circuits placed between EBK and the onboard components on the 5-V and 3.3-V lines. CY8CKIT-030 PSoC 3 Development Kit Guide, Doc.

Cypress Psoc Programming

# 001-61038 Rev. When a reverse voltage is applied across the protection circuit from the external connector side, Q4 P-MOS will turn off, thus protecting the components on the board from reverse voltage. CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. PSoC Development Kit can be easily ported over to port D on this board. A caveat to this is that there is no opamp available on this port; therefore, opamp-based designs are not recommended for use on this port.

CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. Hardware The following figure shows the pin mapping for the port. Port D CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev.

The two grounds on this port help to keep it distinct even on this board until it reaches the GND plane. Port E CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. 155 and port 61. Two LEDs out of the four are hard-wired to port 62 and port 63 and the other two are brought out on pads closer to the prototyping area. CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev.

CAUTION When the resistor is shifted to support a 5-V LCD module, plugging in a 3.3-V LCD mod- ule into the board can damage the LCD module. Pin 1 Indication CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev.

The slider elements are connected to pins P50:4. The Cmod (modulation capacitor) is connected to pin P64 and an optional Rb (bleeder resistor) is available on P154. CapSense Sensors CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. Programming the Code Examples Follow these steps to open and program code examples: 1. In the PSoC Creator start page, go to Examples and Kits Kits CY8CKIT-030 3.0 and click on a code example.

Create a folder in the desired location and click OK. Continuous mode of operation is selected because the ADC scans only one channel. ■ Conversion rate is set to 187 samples/sec, which is the maximum sample rate possible at 20-bit ■ resolution.

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CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. ADC input is measured against internal Vssa. Any offset in the measurement can be positive or negative.

This can result in a small offset voltage even when the potentiometer is zero. Voltage Display CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. Figure 5-4). Note If the CY8CKIT-030 is programmed with any other code example involving LCD display before programming the IntensityLED.hex file, the LCD continues to display the output of the previous project because the LCD component is not used in the IntensityLED project. The LCD display is cleared by power cycling the board.

The device wakes up when SW2 is pressed again and displays the time on the LCD. The following figures show the output display. PSoC 3 in Active Mode CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev.

CapSense buttons and one five-element slider provided on the board. Each capacitive sensor on the board is scanned using the Cypress CSD algorithm. The buttons are pre- tuned in the example code to take care of factors such as board parasitic.

Code Examples Figure 5-7. CapSense Slider Figure 5-8. CapSense Button CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. Turning the potentiometer results in LCD value change. This also results in change in the period of the sine wave fed into LED4, which can also be observed. ADC Output CY8CKIT-030 PSoC 3 Development Kit Guide, Doc.

Psoc Programming Manual

# 001-61038 Rev. 0.1 uFd 1.0 uFd 1.0 uFd 0.1 uFd 0.1 uFd 0603 0603 0402 0402 VSSA 0402 0402 VSSD VSSD Note: PSoC 3 Section Place De-Caps near to the Chip CY8CKIT-030 PSoC 3 Development Kit Guide, Doc.

# 001-61038 Rev. 1 PIN HDR 1 PIN HDR 1 PIN HDR VSSD VDDD VDDD VDDA NO LOAD NO LOAD VSSD NO LOAD NO LOAD VSSD VSSA P9 RECP 8X1 P9 RECP 8X1 CY8CKIT-030 PSoC 3 Development Kit Guide, Doc.

# 001-61038 Rev. LM4140 VREF P32 VREF ZERO ZERO ZERO ZERO 1.0 uFd 1.0 uFd 0603 0603 NO LOAD 3216 3216 0402 0402 0.1 uFd 0.1 uFd VSSA VSSA Voltage Reference VSSA CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. R66 ZERO SERIALRTS SERIALRX SERIALTX MAX3232CDR MAX3232CDR SERIALCTS SERIALRTS 0402 0402 0.1 uFd 0.1 uFd 0402 0402 0.1 uFd 0.1 uFd 4x1 RECP 4x1 RECP NO LOAD VSSD RS 232 CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev.

Board Layout A.2.1 PDC-09589 Top CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. A.2.2 PDC-09589 Power CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. A.2.3 PDC-09589 Ground CY8CKIT-030 PSoC 3 Development Kit Guide, Doc.

# 001-61038 Rev. A.2.4 PDC-09589 Bottom CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. Diodes Inc BZT52C2V0-7-F Diode SOD-123 50MIL KEYED CONN HEADER 10 PIN Samtec FTSH-105-01-L-DV- 50MIL KEYED SMD POWER JACK CONN JACK POWER PJ-102A 2.1mm PCB RA Breadboard BREADBOARD 17x5x2 923273-I CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. 330 ohm RES 330 OHM 1/10W 5% Panasonic - ECG ERJ-6GEYJ331V 0805 SMD R17,R40,R41,R42, RES 10K OHM 1/16W 5% Stackpole Electronics RMCF 1/16S 10K 5% R43,R44,R45, R46 0402 SMD CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev.

TEST POINT PC MINI Keystone Electronics 5000 POINT.040'D RED 2.2K RES 2.2KOHM 1/16W Panasonic - ECG ERA-V27J222V 2700PPM 5%0603 J10,J11 3pjumper CONN HEADER VERT SGL 9-AR 3POS GOLD CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. RES 1/10W 3K OHM 0.1% Stackpole Electronics RNC 20 T9 3K 0.1% 0805 3pjumper CONN HEADER VERT SGL 9-AR 3POS GOLD 2pjumper CONN HEADER VERT SGL 9-AR 2POS GOLD CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. CLOSE TYPE BLACK External Assembly Install 3.3V 3.3V label label as per assembly spec 4-40 X 5 +13 Spacer and nut for RS232 Brass Spacer Connector P7 Stud with Nut CY8CKIT-030 PSoC 3 Development Kit Guide, Doc.

# 001-61038 Rev. Connected to pin 4 (TDI) on port D P15 Connected to pin 3 on port D P16 Connected to pin 2 on port D P17 Connected to pin 1 on port D CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev.

Connected to pin 24 on port E P45 Connected to pin 23 on port E P46 Connected to pin 22 on port E P47 Connected to pin 21 on port E CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. Connected to 32-kHz crystal P153 Connected to 32-kHz crystal Port 15 P154 Connected to Rbleed resistor P155 Connected to SW3 push button P156 Connected to USB D+ P157 Connected to USB D– CY8CKIT-030 PSoC 3 Development Kit Guide, Doc.

# 001-61038 Rev. Note. To enable voltage reference, populate resistors R34, R37, R73, and low dropout voltage ref- erence IC LM4140. See “Bill of Materials (BOM)” on page 47 for more details of components.

CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. Use multiple RBLEED resistors if there are different types of sensors in the design.

PSoC 3 and ■ PSoC 5 supports up to three RBLEED resistors per channel. Use variable resistors for RBLEED, for better tunability. ■ CY8CKIT-030 PSoC 3 Development Kit Guide, Doc.

# 001-61038 Rev.